FPGA Tutorials | applied electronics engineering

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Introduction

This page describes FPGA and contains links to tutorials, codes and videos to help you in learning FPGA programming and implementation.

FPGA(Field Programmable Gate Array)

FPGA is a technology that allows one to create digital system on a FPGA IC using hardware description language(HDL). The FPGA IC contains array of fusable connection between rows and columns of primary logic components(AND, OR, D flip flop). When a digital system is created using HDL language, FPGA vendor software is used to translate the HDL description of the digital system into bit-steam file that is loaded into the FPGA chip. This bit stream file contains the information about which fusable connection to burn, hence creating the digital system on the FPGA chip.

Why use FPGA?

It is possible to design digital system using transistors, logic gates, 74 series devices, SSI, MSI or LSI on a printed circuit board. But if you take this path, you have to design whole system first, on a schematic which can become many pages. You also need to account the devices that are available to you. You have to search for devices on catalog and check their fitness and requirements etc. This is tedious and time consuming.

Whereas FPGA allows one to design a digital system using HDL programming language. 

History

 Digital system in early 1970s were created using TTL digital logic components(74/54 series) and later with CMOS versions(HC, AC, FC, FCT, HCT etc) on PCB(Printed Circuit Board). The components includes SSI and MSI components such as gates(AND, OR, NOR, XOR etc), multiplexers, decoders, flip flops etc. This digital design technique is still used.

PAL(Programmable Array Logic)

Around 1975s, Programmable Array Logic(PAL) chips were manufactured. PAL were chips with array of logic gates that could be connected to perform specific digital functions. Early PAL had 20 pins and had limited capacity of gates and flip flops(less than 10). They could be programmed to function simple finite state machines.




















CPLA(Complex Programmable Logic Array) 

Because of the limitation of the PAL, Complex Programmable Logic Array(CPLA) were developed. These chips could support more gates and flip flops and hence larger digital function could be implemented on them. The basic building block of CPLA were the Macrocell which had the size of one PAL.















FPGA(Field Programmable Gate Array)

To enhance the capability for digital system design, FPGA technology was developed from CPLA. FPGA have more logic gates and more programming flexibility than CPLA. FPGA are based on basic building blocks called Complex Logic Block(CLB). An FPGA has thousands of CLBs lined up in array form which can then be programmed to make interconnection between these CLBs.

Complex Logic Block typical design is shown. The CLB consist of look-up table for implementing combinational logic functions, a D flip flop that is used in combination with look-up table to give synchronous system and multiplexers for giving users the flexibility the implement synchronous or asynchronous digital system. The tri-state buffer is there to enable the output.


Tutorials

VHDL language tutorials

Encoders/ Decoders

Different method for encoder design 
74LS148 Priority encoder
Decoder design 
74LS138 decoder design
Decoder implementation using the Shift operators in VHDL
octal to binary encoder

Multiplexers/Demultiplexers

Multiplexer design
Multiplexer using Concurrent and Sequential VHDL statements

Flip Flops

Asynchronous set/reset D flip flop
Synchronous Reset D flip flop
Positive and Negative Edge Triggered D flip flop
Creating testbench for D flip flop 
Difference between asynchronous and synchronous reset D Flip Flop
Positive and Negative Edge Triggered D flip flop

 Registers

Shift Registers using D flip flop
8 bit shift register design
Circular Shift Register

Counters

Counter with Asynchronous Reset

Mathematical Function

Full Adder design
Adder Subtractor Design
Ripple Carry Adder 
Unsigned/Signed Multiplier

ALU

How to design ALU

Converters

Parallel to Serial VHDL code with testbench
NRZ to Manchester encoding with state diagram and VHDL
Parity Bit Generator/Detector

Modulators/Demodulators

ASK Modulation VHDL Code and Simulation using Xilinx

Functions and Packages

Functions in VHDL

Software Tutorials

VHDL code from Matlab Code
 Matlab: How to configure VHDL Software Synthesis Tool in HDL WorkFlow Advisor?
VHDL Adder circuit using Matlab
Interactive VHDL design simulation using Aldec Active HDL software

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